Power.org's Enhancements to the Power Architecture Technology
Platform
On-demand Webcast
In this 90-minute webcast, Power.org highlights some of the key technology
standards our members are collaboratively developing for the Power
Architecture electronics platform:
- Enhancements to the Power Instruction Set Architecture (ISA)
- Standardized debug interface for single and multicore devices
- Hypervisor capabilities for embedded applications
- Specifications to simplify and enhance virtual modeling and
simulation
Power.org's technology standards have significant and lasting benefits for
the Power Architecture processing platform, which provides the computing
intelligence for a broad range of advanced electronics, from the world's
fastest supercomputers to the automotive control systems in more than half
the new car models on today's roads.
If you're interested in learning how Power.org is making the Power
Architecture electronics platform even easier and faster to use, as well as
how we're extending our technology leadership in areas such as multicore
processing, then this 90-minute webcast is for you.
Webcast Highlights
- Power.org Overview - Fawzi Behmann, Chair of Power.org's Marketing Committee
- 2008 Technical Initiatives Update - Dr. Syed Shah, Co-chair of Power.org's Technical Committee
- Virtual Platforms - Kaveh Massoudian, Co-chair of Power.org's Technical Committee
- Instruction Set Architecture & Embedded Virtualization - Gary Whisenhunt, Power Architecture Advisory Council
- Common Debug Interface (CDI) - Chris Ng, Chair of Power.org's Common
Debug Interface Technical Subcommittee