IBM's PowerPC 405 Core Specification Download
IBM has announced plans to make the specifications of the PowerPC 405 Core freely available to the academic and research community. |
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The move is in response to requests by leading educators in computer
science and participants in collaborative multi-core processing research
projects, such as the Research Accelerator for Multiple Processors
(RAMP). RAMP is led by the University of California Berkeley, Stanford
University, Massachusetts Institute of Technology (MIT), Carnegie Mellon
University (CMU), University of Texas -Austin and the University of
Washington. RAMP researchers will now be able to map this core into their FPGA-based systems (Field Programmable Gate Arrays), for new chip architecture experiments. |
Apply for the download today
Thank you for your interest in using PowerPC 405 in your research. We indicated we would have the program up and running in Q1 of 2006. Now we have formalized the program, and are eager to help you get started as quickly as possible.
The PowerPC 405 belongs to IBM, so the first step towards receiving the core design is to register under IBM's Academic initiative, which is open to faculty members of all legitimate universities. Members of the Academic initiative can receive the core design free of charge. If you are not a faculty member, you should work with an appropriate faculty member to secure access to the core design.
Here are the steps for the faculty members to gain access to the PowerPC 405 core design and and supporting materials:
- Faculty need to be IBM Academic Initiative Member (visit www.ibm.com/university to apply)
- Once approved for membership, faculty can return to the Academic Initative site and click on "Downloads and CDs" on the right-hand menu of the Web site. Look for the "PowerPC 405 Core offer" section and click on "Request the PowerPC 405 License and RTL download." Fill out all fields of the request form.
- Faculty will receive the PPC 405 core license agreement via email or fax within 4 business days of completing steps 1 and 2
- Faculty will sign the license agreement and return it to IBM
- Faculty will receive instructions on how to access the PowerPC 405 design files and supporting material within 1 week of completing step 4
- Faculty will be required to document and maintain records that show any student or staff member understands and agrees to abide by the terms of the license agreement signed with IBM prior to their staff/student access to the PowerPC 405 core design.
There is a discussion forum set up on Power.org to answer any questions that you might have once you start using the PowerPC 405 materials. You need to sign up as a developer member to be able to start posting questions and getting responses.
About the PowerPC 405 core
The IBM PowerPC 405 core is a 32-bit RISC CPU core providing up to 400 MHz
and 608 DMIPS performance as implemented in IBM's advanced 90-nm copper CMOS
technology. The 405 core is enabled for today's smart power management
schemes, including both frequency and voltage scaling, under operating
system control. The PowerPC 405 core's performance, low power specifications and design attributes make it an ideal solution for emerging consumer, storage and wired or wireless communications applications.
- For more information, please refer to IBM's PowerPC 405 core page.
Power.org is merely providing hosting services for this download. None of the materials are from Power.org nor are they a Power.org specification. Power.org provides them "AS IS" with no warranties.