IBM's PowerPC 405 Core Specification Download
IBM has announced plans to make the specifications of the PowerPC 405 Core freely available to the academic and research community. |
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The move is in response to requests by leading educators in computer science and participants in collaborative multi-core processing research projects, such as the Research Accelerator for Multiple Processors (RAMP). RAMP is led by the University of California Berkeley, Stanford University, Massachusetts Institute of Technology (MIT), Carnegie Mellon University (CMU), University of Texas -Austin and the University of Washington. RAMP researchers will now be able to map this core into their FPGA-based systems (Field Programmable Gate Arrays), for new chip architecture experiments. |
Apply for the download today
Thank you for your interest in using PowerPC 405 in your research. The program has been in existence since 2006. Since 2006, over 40 Universities from around the world have taken advantage of this offer and are participating in the program.
The PowerPC 405 core is intellectual property that belongs to IBM, so the first step towards receiving the core design information is to join IBM's Academic Initiative, which is open to faculty members of worldwide universities for use in teaching and research. Members of the Academic Initiative can receive the core design information free of charge. If you are not a faculty member, you should work with an appropriate faculty member to secure access to the core information.
Faculty can follow these steps to gain access to the PowerPC 405 core design and its supporting materials:
1. You must be an IBM Academic Initiative member. Visit the Academic Initiative Web site (http://ibm.com/academicinitiative) to apply. After you are approved for membership, return to this page to proceed with Steps 2 and 3.
2. Go to the PowerPC 405U RTL request form ( https://www14.software.ibm.com/webapp/iwm/web/preLogin.do?lang=en_US&source=ppc405urtl), log in with your IBM ID and password, complete and submit the form. You will receive an email verifying the information and intent to sign license agreement within four business days after IBM receives your request. A draft of the PPC 405 core license agreement will be sent to you by email.
3. When you receive the PPC 405 core license agreement, sign it and return it to IBM.
· Within one week of completing Step 3, you will receive instructions on how to access the PowerPC 405 design files and supporting material.
· Prior to you giving any staff/students access to the PowerPC 405 core design, you are required to document and maintain records showing that they understand and agree to abide by the terms of the license agreement signed with IBM.
There is a discussion forum set up on Power.org to answer any questions that you might have once you start using the PowerPC 405 materials. You need to sign up as a developer member to be able to start posting questions and getting responses.
About the PowerPC 405 core
The IBM PowerPC 405 core is a 32-bit RISC CPU core providing up to 400 MHz and 608 DMIPS performance as implemented in IBM's advanced 90-nm copper CMOS technology. The 405 core is enabled for today's smart power management schemes, including both frequency and voltage scaling, under operating system control.
The PowerPC 405 core's performance, low power specifications and design attributes make it an ideal solution for emerging consumer, storage and wired or wireless communications applications.
- For more information, please refer to IBM's PowerPC 405 core page.
Power.org is merely providing hosting services for this download. None of the materials are from Power.org nor are they a Power.org specification. Power.org provides them "AS IS" with no warranties.