Cell BE Training Series Track 1: Cell Software Development Overview
About the series
This series of podcasts is a Cell Broadband Engine training series. The first track consists of 10 sessions that focus on the overall system development environment of the Cell processor. Each session is made up of an audio file and a matching PowerPoint file. Please see the agenda for a detailed description of each session. This training is presented by expert speakers that are involved in Cell development. Each session is approximately one hour. Download the audio files below and your choice of PowerPoint, PDF, or ODP (open office) files.
Cell BE Seminar Series - Track 1: Cell Software Development Overview
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Topic |
Description |
Auidence & |
Materials |
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Cell Today and Tomorrow L1T1H1-01 Peter Hofstee, Ph.D., Cell Chief Scientist and Chief Architect |
This session is about computing paradigm shift and will cover everything from single thread performance to application-specific system customization. It also covers how Cell was developed to increase the concurrency and non-homogeneous architecture for specialization. We will discuss the motivation and decisions in cell design including goals, concept, architecture, and asynchronious load/store, SPE architecture decisions and basic SPE block diagram. We will point out things that work extremely well on Cell, or just well, and not well at all. We will close with a look into future of Cell and discuss how user interaction is driving computing and the latest transition in user interface. |
ISVs, VCs, Execs, Sales, Developers General programming experience |
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Cell Overview L1T1H1-02 Michael Perrone, Ph.D., Cell Applications Group |
This session presents an overview of Cell history, Cell microprocessor highlights, hardware architecture and components, software development environment including standard interfaces, programming models, operating system runtime strategy, system simulator, development tools, Cell performance characteristics, Cell blade server, and Cell application affinity and target opportunities. |
ISVs, VCs, Execs, Sales, Developers General programming experience |
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Cell Architecture L1T1H1-10 Jim Kahle, IBM Fellow |
This session covers Cell history and Cell design motivation, as well as how Cell overcomes three important limiters of contemporary microprocessor performance: power use, memory use, and processor frequency. We will discuss the Cell processor organization and components: Power processor element, block diagram, PXU pipeline, Synergistic processor element, block diagram, SXU pipeline, Memory flow controller and MFC commands, Element interconnect bus, command and data topology, I/O and memory interfaces, and Resource allocation management. |
Developers General programming experience |
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Cell Software Overview L2T1H1-11 Michael Day, Ted Maeurer, Robert Todd, STI Design Center |
In this session, we will discuss Cell software considerations including the two levels of parallelism in cell: SIMD and parallel task execution. Computational discussion points: multi-core, multi-threading, and multiple local store accesses, Commutational: DMA bus bandwidth, traffic control, shared memory/message passing, and synchronization, as well as programming models that exploit Cell features. |
Developers L1T1H1-10 |
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Cell Software Development Environment L2T1H1-12 Dan Brokenshire, STI Design Center |
This session introduces the Cell software development environment, standards: language extension, SPU ABI, and Linux reference ABI, development environment: code development tools, debug tools, performance tools, and other miscellaneous tools, execution environment: Linux CBE extensions, SPE management library, SPE optimized function libraries, system level simulator, samples, workloads, and demos. |
Developers L2T1H1-11 |
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Cell Application Affinity L2T1H1-13 Barry Minor, STI Design Center |
Here we will learn how Cell can offer much greater performance than traditional GPP for media and applications that can take advantage of its SIMD capability. We will discuss key cell application areas and their characteristics, such as: Digital content creation (games and movies), Game playing and game serving, Distribution of dynamic, media rich content, Imaging and image processing, Image analysis (e.g., video surveillance), Next-generation physics-based visualization, video conferencing, streaming applications (codecs etc.), physical simulation , and science, as well as techniques used in the Terrain Rendering Engine (TRE) demo to exploit Cell performance ,such as PPE & SPE Data Staging, Ray-casting with SIMD, SPE ray kernel, and SPE local store memory layout. |
Developers L2T1H1-12 |
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The IBM Full System Simulator for Cell L2T1H1-20 Mike Kistler, IBM Austin Research Lab |
We will discuss the IBM Full System Simulator features and development environment, SystemSim for Cell, including: overview, runtime environment, how to get started, user interface, donfiguration, debugging with GDB, data collection, and statistics. |
Developers L2T1H1-12 |
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Linux on Cell - Kernal L2T1H1-30 Arnd Bergmann, Cell LTC |
In this session you will learn how Linux was run on Cell and how the kernel communicates with the SPU, about the threading model on Cell: PPE thread vs. SPE thread, Linux runtime strategy, and how threads and SPE contexts were managed on cell, the distinction between threads and tasks, PU and SPU runtime requirements, interaction between PPE code and SPE code, SPU file system, spufs, and how to use SPU contexts and signal handling. |
Developers L2T1H1-12 |
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Linux on Cell - Toolchain and GDB L2T1H1-31 Sid Manning, STI Design Center |
Learn the new GNU toolchain for the Cell BE, and learn how gdb can be used on the Cell BE architecture to debug applications, debugging SPE threads, debugging Cell BE applications, and graphical debugger front-end DDD. |
Developers L2T1H1-30 |
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L2T1H1-32 Linux on Cell - Compiliers Alex Eichenberger |
Learn the IBM XLC and the GNU GCC compilers for Cell, plus their specific optimization flags. |
L2T1H1-30 |
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