This area of the site will provide links to evaluation kits, tools, and downloads that will help you with your Power Architecture designs. To view Members-only specifications from Committees please go to the Committee Output and Specifications for Members page. Please contact us if you have a resource you would like listed here.

Power ISA Documentation

Power Instruction Set Architecture Version 2.06
The Power Architecture Advisory Council announces the public availability of Power ISA 2.06. This version is a major advance for the server and the embedded Power architecture. Major extensions include a new Vector-Scalar Floating-Point facility that supports vector and scalar floating-point operations, numerous new fixed-point, floating-point, and memory-management instructions, a new storage attribute, support for stronger storage access ordering, new storage control features, and many other enhancements. Extensions to the Embedded environment include an enhanced memory management architecture, logical partitioning and hypervisor support, embedded page table support, and multi-threading []

Power Instruction Set Architecture Version 2.05
The Power Architecture Advisory Council has advanced another step in the Power ISA roadmap. Power ISA version 2.05 enhances the capabilities of the architecture with the addition of decimal floating point facilities, power management capabilities, new instructions supporting computation efficiency and memory management, new facilities for measuring resource utilization and partition migration, and other enhancements. []

Power Instruction Set Architecture Version 2.04
The Power Architecture Advisory Council announces the public availability of Power ISA 2.04. Power ISA 2.04 enhances storage management and protection in the server environment. Some of the change is aimed at improved virtualization. []

Power Instruction Set Architecture Version 2.03
The Power ISA version 2.03 represents a reunification of the architecture, combining Book E content with the more general purpose PowerPC Version 2.02. A significant benefit of the specification is the establishment of a single, compatible, 64-bit programming model. [] Public Specifications

ePAPR Version 1.1

The ePAPR specification defines standards for Power Architecture system around how a boot program (e.g. boot firmware, hypervisor) starts a client program (e.g. an operating system). The ePAPR is oriented to the requirements of embedded systems. Standards include device trees and how multiple CPUs are initialized and started on a multi-core processor. Version 1.1 of the ePAPR makes some incremental changes and clarifications to ePAPR 1.0 and adds a new chapter on virtualization. Representation of CPUs in device trees is extended to better support representation of processors with a large number of CPUs, multi-threaded CPUs, and to define which Power ISA categories a CPU implements. Several device tree properties in common use are now formally standardized. The virtualization chapter in ePAPR 1.1 defines a standard para-virtualization interface for use by a hypervisor and guest operating systems enabling implementations by different software vendors to seamlessly work together. The virtualization features include an ABI and APIs for a set of hypervisor services including– a virtual interrupt controller, byte-channels, and inter-partition doorbells.

Power Architecture 32-bit ABI Supplement 1.0 Embedded/Linux/Unified published Power Architecture® 32-bit Application Binary Interface Supplement that is current with Power ISA 2.05 (Power Architecture® 32-bit ABI Supplement 1.0). The supplement provides detailed documentation on the current state of the 32-bit Power Architecture processor-specific ELF ABI as implemented for the Linux Operating System and embedded environments. The new document, which includes every unique update generated by interested parties of the ABI, was published under the GNU Free Document License (Version 1.3).


Power Architecture 32-bit ABI Supplement 1.0 Embedded

Power Architecture 32-bit ABI Supplement 1.0 Linux

Power Architecture 32-bit ABI Supplement 1.0 Unified


Power ABI source archive as required company signature under the GFDL with accompanying signature file